Electric circuits upon fabrication are typically subjected to testing to verify operability. Some circuits are subjected to electrical and environmental stress prior to being packaged and shipped to an end user. Such testing and/or stress might occur relative to a wafer or other substrate containing a plurality of fabricated integrated circuits or die prior to singulation. Alternately by way of example only, such testing and/or stress might occur after singulation into individual die and/or in connection with such die mounted to or a part of another substrate.
Such testing and/or stress is typically conducted with a probing device, and is commonly referred to as “probe”. The circuit under test is typically provided with a series of exposed electrical contacts or bond pads. These are mechanically and electrically contacted with needle-like probe tips whereupon the testing and/or stressing of the integrated circuit occurs. At the conclusion of the testing and/or stress, the integrated circuit substrate and probe tips are physically separated from one another, and the probe device is utilized to test or stress another circuit substrate.
The needle-like probe tips are typically provided on what is synonymously commonly referred to as any of a probe card, probe interposer, or probe transposer. Such physically mounts to a larger system which is capable of providing electrical stimulus through the probe card to an integrated or other electric circuit under test/stress. The probe card/interposer/transposer might alternately mount to another structure or cassette which directly mounts to the larger system which provides the desired electrical stimulus. Regardless, the probe interposer typically can be used multiple times, yet can be replaced upon damage or wear.
Existing technology, of course, relies upon very precise x, y and z-axis positioning of the substrate under test/stress relative to the probing equipment. Accordingly, the probe interposer needs to be precisely and accurately mounted relative to the system providing electrical stimulus as well as be precisely positionable relative to the integrated circuit undergoing test/stress. The probe tips must therefore be precisely aligned in x and y-axes such that they engage desired contact/bond pads on the circuit under test/stress. Further, the electric circuit substrate undergoing test/stress and the probe card must be precisely positionable along the z-axis direction (toward and away from one another) to make desired physical contact of the probe tips with the contact pads in a manner which is effective yet not damaging of either the electric circuit substrate or the probe tips. Such is, in part, presently accommodated for by making the probe tips yieldable in a spring-like manner in the z-axis direction.
Further and regardless, optical equipment might be utilized for precisely positioning the probe card and electric circuit substrate relative to one another in any of the x, y and/or z-axes. Additionally, the relative probe contacting is typically along a plane requiring that the electric circuit substrate and probe card be leveled relative to one another such that the presentation of one to the other is very close to, if not perfectly, parallel. Any degree of leveling that does not achieve essentially parallel interfacing can over-stress or damage some of the probe tips and/or contact pads of the electric circuit substrate undergoing test or stress.
While the invention was motivated in addressing the above identified issues, it is in no way so limited. The invention is only limited by the accompanying claims as literally worded, without interpretative or other limiting reference to the specification, and in accordance with the doctrine of equivalents.